[세미나] [ESRC] SoC architectures and IP cores for Video Compression and Wireless Communications

2003-11-28l Hit 21505

내장형시스템연구센터(ESRC)에서 아래와 같이 세미나를 준비하였습니다.
강사는 북아일랜드 Queen's University Belfast의 Prof. John V. McCanny 교수님이고
주제는 "SoC architectures and IP cores for Video Compression and Wireless Communications"입니다.
여러분들의 많은 관심과 참석을 부탁드립니다.

-------------------------------     아       래     ---------------------------------
1. 일시 : 2003. 12. 1 (월) 오후 4시
2. 주제 : SoC architectures and IP cores for Video Compression and Wireless Communications
3. 강사 : Prof. John V. McCanny (Queen's University Belfast)
4. 장소 : 반도체공동연구소 설계연구관 도연홀 (104-1동)
5. Abstract :
    System-on-Chip (SoC) architectures for video compression and wireless communications. To put this in context a brief summary will first be given of early research on bit level systolic arrays and subsequent commercial chip designs created from these ideas. This led to important insights and understandings in terms of the mapping of such computations onto special purpose datapaths, with this then being used to derive methodologies for the rapid design of more complex DSP SoCs. As will be discussed,  such methods have now been used extensively commercially by Amphion Semiconductor Limited to create new families of world leading SoC cores for important video compression standards. These include multi-channel MPEG2. MPEG4, JPEG2000 and other cores that comply with major industry standards. They have also been used to derive architectures suitable for the rapid design of single chip implementation of processors for real time QR and Singular Value Decomposition (SVD) computations which are used increasingly needed in the design of adaptive and smart antennas, for example, for wireless communication systems. A brief overview will also be given on SoC architectures for encryption covering both private (e.g. Rinjdael) and public key (e.g. RSA) cryptography.
    The talk will conclude by giving an overview of the major new research centre in which this and related research is being undertaken – the Institute of Electronics, Communications and Information Technology (ECIT). This is a $65M facility and is being built on the N. Ireland Science Park. Amongst many other technologies, the Institute will host a major new ($8M) centre for research on System-on-Chip and Microwireless Integration (SoCAM).

6. 강연자 약력
▶ International authority in the design of silicon integrated circuits for Digital Signal Processing
▶ Fellow of the Royal Academy of Engineering, the IEE and the Institute of Physic
▶ IEEE (USA) Fellow and a Member of the Royal Irish Academy
▶ Co-founded Audio Processing Technology Ltd., Amphion Semiconductor Ltd.
▶ Chaired the IEEE Signal Processing Society's Technical Committee on the Design, 1999-2000
▶ Elected Fellow of the Royal Society and awarded a CBE in 2002
▶ 수상 :
      UK Royal Academy of Engineering Silver Medal in 1996
      IEEE 3rd Millennium medal in 2000
      Royal Dublin Society/Irish Times Boyle Medal
▶ 현재 :
      Prof. of Queen's University Belfast (N. Ireland)
      Director of the Institute for ECIT (Electronics Communications and Information Technology)

담당/문의 : 김소영 (880-1309/