▲ (From left) Prof. Chul-Ho Lee (corresponding author), Ph.D. Yeon Ho Kim (first author), Ph.D. candidate Jaeho Lee (co-author), and integrated M.S.–Ph.D. candidate Donghyun Lee (co-author) Seoul National University’s College of Engineering announced that the research team led by Professor Chul-Ho Lee of the Department of Electrical and Computer Engineering has comprehensively proposed development directions for “gate stack”*, a core technology in two-dimensional (2D) transistors, which are emerging as next-generation semiconductor devices. *gate stack: the structure that controls current flow in transistors, consisting of a dielectric and metal stacked on top of the conductive layer On September 11, the findings were published in Nature Electronics (Impact Factor 40.9), a leading international journal at the forefront of semiconductor technology. ■ Research Background Modern semiconductors rely predominantly on silicon-based CMOS (Complementary Metal-Oxide-Semiconductor) technology, which has driven improvements in device performance and degree of integration over the past several decades. However, at today’s ultra-fine process scales of just a few nanometers (nm), this approach is encountering physical limitations. As a promising alternative channel material, 2D semiconductors—composed of atomically thin layers yet still capable of maintaining excellent electrical properties—are gaining increasing attention. Major global semiconductor companies and research institutes—including Samsung, TSMC, Intel, and IMEC—have already incorporated plans into their technology roadmaps to adopt 2D semiconductor transistors as the next-generation alternative to silicon in the mid-2030s, launching large-scale R&D efforts. In this context, 2D semiconductors are no longer a technology of the distant future but are rapidly emerging as the next mainstream driver of the global semiconductor industry. Yet, one of the greatest obstacles to the commercialization of 2D semiconductors lies in gate stack process technology. The gate stack is a core structure of semiconductors that controls the flow of current, and its quality directly determines the performance and reliability of the device. However, directly applying conventional silicon transistor processes to 2D semiconductors leads to degraded dielectric* quality, interfacial defects, and current leakage. Developing new materials and processes to overcome these issues is considered the most critical challenge for the commercialization of 2D semiconductors. *dielectric : insulating layer that prevents the flow of electricity ■ Research Achievements In response, Prof. Chul-Ho Lee’s research team analyzed various gate stack formation methods and quantitatively compared them across key performance metrics, thereby outlining a roadmap for future technological development. First, the research team classified gate stack formation methods into five categories: △van der Waals (vdW) dielectric, △naturally oxidized dielectric, △crystalline dielectric transfer method (quasi-vdW), △high-κ dielectric formation using a seed layer (vdW-seeded), and △methods compatible with conventional processes (non-vdW-seeded). Each method was then evaluated against key performance metrics—including interface defects, oxide film thickness, leakage current, threshold voltage, and operating voltage—and compared against the targets set by the International Roadmap for Devices and Systems (IRDS). Through this process, the team established a systematic development roadmap that can serve as a reference for both academia and industry. The research team also highlighted the potential of gate stacks incorporating ferroelectric* materials to be scaled up to next-generation devices. For example, ferroelectric-based gate stacks could enable ultra-low-power logic, non-volatile memory, and in-memory computing. In addition, the team provided concrete guidelines for practical implementation, addressing essential factors such as BEOL (Back-End-of-Line) process compatibility, low-temperature deposition below 400°C, wafer-wide uniformity, and long-term reliability, thereby emphasizing real-world industrial applicability beyond purely theoretical discussions. *ferroelectric: a material that retains electric polarization even in the absence of an external electric field. It is used in applications such as the implementation of non-volatile memory. This study is significant in that it quantitatively compared the performance of 2D semiconductor gate stacks across multiple metrics and evaluated them against IRDS targets, thereby providing a blueprint for the development of next-generation semiconductors. In doing so, the researchers not only confirmed the feasibility of implementing ultra-low-power, high-performance transistors but also proposed concrete technological directions considering future 3D monolithic stacking and BEOL-compatible processes, marking an innovative achievement. Furthermore, the technologies presented in this research are expected to serve as core foundational technologies driving the development of next-generation ICT infrastructure, including AI semiconductors, ultra-low-power mobile chips, and ultra-high-density servers. ■ Researchers' Remarks Prof. Chul-Ho Lee stated, “The biggest obstacle to the commercialization of 2D transistors is the implementation of high-quality gate stacks. This study provides a standard blueprint to overcome that challenge, which has significant academic and industrial implications. Moving forward, we plan to actively expand research on actual device integration and commercialization through industry–academia collaboration.” ■ About the Research Team Prof. Chul-Ho Lee’s research team at Seoul National University is actively leading the international academic community in the field of 2D semiconductor devices, particularly in high-quality gate stack technology. The team goes beyond purely theoretical proposals, conducting comprehensive research that encompasses actual device fabrication and process integration. By taking the lead in addressing key challenges of next-generation semiconductors, the group has established itself as a central player driving the global trajectory of future semiconductor research. ■ Researcher Career Path The first author of this paper, Ph.D. Yeon Ho Kim, is currently working as a postdoctoral researcher in the ECE Department at SNU, with a focus on metal-semiconductor contact and gate stack-related research for 2D semiconductor-based transistors. Building on this achievement, he is expected to demonstrate both academic and industrial leadership in the field of next-generation 2D semiconductor integrated devices. This research was conducted with support from the Next Generation Intelligence Semiconductor Development Program and the Nano and Materials Technology Development Program (Future Technology Laboratory), both funded by the Ministry of Science and ICT. Graduate students involved in the study also received support from BK21 Four and the Graduate School of AI Semiconductor. Figure 1. Roadmap of CMOS logic technology development and the potential of angstrom-scale 2D transistors [Reference] Kim, Y.H., Lee, D., Huh, W. et al. Gate stack engineering of two-dimensional transistors. Nat Electron (2025). https://www.nature.com/articles/s41928-025-01448-5 [Contact] Ph.D. Yeon Ho Kim, Laboratory of Emerging Electronics & optoElectronics (Lab.EEE), Department of Electrical and Computer Engineering, Seoul National University / julianus95@snu.ac.kr Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56869 Translated by: Changhoon Kang, English Editor of the Department of Electrical and Computer Engineering, changhoon27@snu.ac.kr...

On September 5, Professor Emeritus Wook-Hyun Kwon of Seoul National University delivered a congratulatory address at the 30th anniversary ceremony of the integration of the Department of Electrical and Computer Engineering, held at the College of Engineering Building 1./SNU ECE Marking its 30th anniversary of integration, Seoul National University’s Department of Electrical and Computer Engineering heard from its first chair after integration, Professor Emeritus Wook-Hyun Kwon, who emphasized, “Just as the ECE Department achieved integration, barriers between departments must be broken down to further strengthen the competitiveness of engineering research.” The 30th anniversary ceremony took place on September 5 at SNU’s College of Engineering Building 1. Back in 1995, the departments of Electrical Engineering, Electronics Engineering, and Control and Instrumentation Engineering were merged into a single unit under the name “Department of Electrical Engineering”, integrating curricula, academic systems and research activities. At the time, Professor Kwon, then with the Department of Control and Instrumentation Engineering, joined his colleagues—including the late Professor Song-Yeop Han and Professor Hong Shick Min—in spearheading a voluntary integration. They believed that unifying disciplines would enable larger-scale research and reduce redundancy in research and education, thus opening pathways to progress. The newly merged Department of Electrical Engineering was later named the “Department of Electrical and Computer Engineering” in 2012, facilitating interdisciplinary collaboration ever since. In an interview with Chosun Ilbo, Professor Kwon remarked, “Just as economies of scale create efficiencies, research must also expand in scale to enable convergence and enhance global competitiveness. Thirty years ago, the objective of the ECE Department’s integration was to broaden the scope of research and contribute to industrial development.” He added, “Engineering entails the responsibility of advancing industries to raise national competitiveness, and engineers must continue to highlight the importance of STEM in our country.” On September 5 afternoon, the 30th anniversary ceremony of the integration of the ECE Department was held at the College of Engineering Building 1./SNU ECE On the issue of the so-called “crisis in STEM education,” Professor Kwon cautioned, “Top students are disproportionately heading to medical and dental schools, narrowing the talent pool.” He reflected, “In the 1990s, engineering drove industrial growth, and at SNU it stood as the most sought-after discipline in STEM, with the highest entrance scores. However, after the IMF financial crisis, talented individuals increasingly gravitated toward more stable career paths. It is now up to us engineers to demonstrate, through our efforts and achievements, the extent to which engineering contributes to national development.” In his address, Professor Kwon also urged the university to address concerns of “talent outflow” at SNU. “When outsiders evaluate our department, they often point out that there are no ‘star professors,’” he said. “We must cultivate an atmosphere where such faculty can emerge, because when outstanding individuals stand out, they become role models and inspire others.” At the ceremony, commemorative plaques were presented to the late Professor Song-Yeop Han, Professor Hong Shick Min, and Professor Wook-Hyun Kwon for their contributions to the integration of the department. Alumni including Joo-Kwan Kim, CEO of Naver Shopping, and Kay Woo, CEO of MVL, were also in attendance. Source: https://www.chosun.com/national/national_general/2025/09/07/ZXFEXD7UKZCAHEDFFUUARLWOXY/ Translated by: Changhoon Kang, English Editor of the Department of Electrical and Computer Engineering, changhoon27@snu.ac.kr...

On August 28, 2025, the Department of Electrical and Computer Engineering held its 79th Commencement Ceremony for the 2024 Academic Year (Fall Semester), conferring degrees upon 52 doctoral graduates, 20 master’s graduates, and 62 bachelor’s graduates. The ceremony featured degree conferrals for representative graduates, the presentation of the Graduate School’s Outstanding Thesis Award, and the recognition of summa cum laude and cum laude graduates. Professor Yoonchan Jeong delivered a congratulatory address, offering words of encouragement and best wishes for the bright future of the graduating class. Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56836 Translated by: Changhoon Kang, English Editor of the Department of Electrical and Computer Engineering, changhoon27@snu.ac.kr...

Since June 2024, SNU has been conducting the first phase of joint research with the UK Atomic Energy Authority (UKAEA) to develop high-current high-temperature superconducting (HTS) cables for use in the next-generation fusion power plant STEP (Spherical Tokamak for Energy Production). Phase 1 (June 2024 – March 2025, total budget of £1 million, approx. 1.8 billion KRW) was successfully completed, and the two sides have signed an agreement to launch Phase 2 (July 2025 – March 2027, total budget of £3.6 million, approx. 6.6 billion KRW). In collaboration with domestic companies Powernix Co., Ltd. and Standard Magnet Co., Ltd., the HTS fusion cable prototype was completed and, in July 2025, tested at the internationally recognized SULTAN facility at the Swiss Federal Institute of Technology Lausanne (EPFL). The prototype reached the facility’s operational limits, demonstrating both current-carrying capacity and durability. Since the launch of SULTAN in 1992, the cable achieved the highest performance ever recorded for an HTS cable: withstanding a current of 91 kiloamperes (kA) under an external magnetic field of 10.9 tesla (T), as well as electromagnetic forces of 100 tons per meter. Remarkably, the cable showed no performance degradation even after more than 1,400 repeated tests. Under the Phase 2 agreement, the research will focus on enhancing the performance of the Phase 1 prototype and scaling up to longer cable lengths. The partnership is also expected to expand bilateral collaboration on next-generation compact fusion technology, while advancing the reliability and technology readiness level (TRL) of high-temperature superconducting magnets, a critical enabling technology for fusion. The Applied Superconductivity Laboratory (ASL) at Seoul National University (Director: Professor Seung Youn Hahn, Department of Electrical and Computer Engineering, SNU) announced on the 29th that, through Phase 1 joint research with UK Industrial Fusion Solutions (UKIFS)—the organization leading the “STEP (Spherical Tokamak for Energy Production)” program under the UK Atomic Energy Authority (UKAEA)—it has successfully developed the world’s highest-performance and most reliable high-temperature superconducting cable for fusion. Building on this achievement, the lab has signed a Phase 2 cooperation agreement to develop long-length HTS cable technology. STEP is the United Kingdom’s flagship national strategic infrastructure project led by the UKAEA, with the goal of constructing a fusion power plant by 2040. The program consists of three phases, and in the current first phase (2019–2025), £220 million (approximately 390 billion KRW) has been invested in the conceptual design of a prototype fusion power plant based on high-temperature superconducting magnets, to be built at West Burton in Nottinghamshire. From June 2024 to March 2025, the Applied Superconductivity Laboratory (ASL) at SNU and the UKAEA carried out joint research worth £1 million (approximately 1.8 billion KRW) to develop high-current high-temperature superconducting cables, a core component of fusion systems. Figure 1. Conceptual design of the STEP (Spherical Tokamak for Energy Production) fusion reactor under development by the UK Atomic Energy Authority (UKAEA) (Source: https://step.ukaea.uk/) With the rapid spread of artificial intelligence technologies and the soaring demand for data centers, global power shortages are becoming increasingly severe. In this context, fusion energy is drawing attention as a game-changing clean energy source for solving future energy crises, and research in this field is actively underway worldwide. In particular, the “magnetic confinement” method, which controls plasma—the fuel for fusion—using the strong magnetic fields generated by superconducting magnets, has been adopted in multiple fusion systems, including Korea’s KSTAR and the International Thermonuclear Experimental Reactor (ITER). However, the large scale of superconducting magnets and the resulting massive construction costs remain major factors pushing back commercialization timelines to beyond 2050. To overcome these limitations, Professor Seung Youn Hahn of SNU’s Department of Electrical and Computer Engineering has proposed “no-insulation high-temperature superconducting” technology, which is expected to enable “compact fusion” by reducing the size of conventional superconducting magnets to less than one-fifth, while dramatically cutting construction and operating costs. Against this backdrop, more than 13 trillion KRW of private investment has flowed into fusion research worldwide in recent years, fueling the creation of numerous startups and public–private partnership initiatives. In July 2024, Korea also announced its “Fusion Energy Realization Acceleration Strategy,” establishing a plan to launch a new program worth 1.2 trillion KRW to advance fusion technologies, including high-temperature superconducting magnets. As part of this global strategic momentum, the STEP program aims to bring forward the commercialization of a fusion power plant with a capacity of more than 100 MW—enough to supply electricity to over 200,000 households—into the 2040s. Figure 2. Configuration of a high-temperature superconducting magnet system for fusion: (1) wire; (2) cable; (3) magnet; (4) system. The UKAEA–SNU joint research agreement will begin with cables and expand to magnets and full systems. (Source: Wire – https://sunam2004.tradekorea.com/main.do; Cable – provided by SNU; Magnet – K. J. Chung et al., Design and Fabrication of VEST at SNU, presented at the 16th International Workshop on Spherical Torus, Sep. 27–30, 2011; System – https://actu.epfl.ch/news/welcome-mast-upgrade-a-new-fusion-device/) Figure 3. Preparation of tests in liquid nitrogen for the high-current HTS cable specimen developed by the Applied Superconductivity Laboratory (ASL) at SNU for STEP fusion magnets, prior to transport to the SULTAN facility. Since June 2024, in the first phase of collaboration, SNU worked with the UKAEA to design a 3.6-meter high-current HTS cable prototype. The prototype was fabricated directly by the Applied Superconductivity Laboratory (ASL) at SNU, using cable manufacturing equipment developed in-house and installed at the College of Engineering’s Power Research Institute. In July 2025, the completed prototype underwent performance evaluation at SULTAN (SUpraLeiter Test ANlage), the world-renowned superconducting cable testing facility at the Swiss Federal Institute of Technology Lausanne (EPFL). The cable achieved the maximum operational conditions available at SULTAN: an external magnetic field of 10.9 T and an operating current of 91 kA, equivalent to an electromagnetic force of 100 tons per meter. Moreover, under cyclic loading conditions (85 kA, 10.9 T, approximately 94 tons/m), the cable endured over 1,400 charge–discharge and deliberately induced quench cycles—including 1,389 repetitions—without any observable performance degradation. These results demonstrate the prototype’s outstanding performance and reliability, marking an unprecedented achievement for HTS cables since the SULTAN facility began operations in 1992. Notably, the performance indicators had been predicted in advance using HTS cable analysis software independently developed by ASL at SNU, and the SULTAN tests validated the accuracy of these predictions, lending the results even greater significance. Figure 4. (Left) View of the SULTAN testing facility managed by the Swiss Plasma Center (SPC) under EPFL. The facility is enclosed in the light green frame on the right side of the image. (Source: https://www.epfl.ch/research/domains/swiss-plasma-center/research/superconductivity/page-97675-en-html/) (Right) Data recorded when the cable reached its maximum current: representative voltage (dark blue) and current (blue) plots in the high-field (10.9 T) region, showing that the cable reached 91 kA at around 20 K. Behind this achievement lies the work of the PRISM research group (High-Temperature Superconducting Magnet Fundamental Technology Research Center), led by Visiting Professor Sang Jin Lee of SNU’s Department of Electrical and Computer Engineering. The program is supported by the National Research Foundation of Korea under the Ministry of Science and ICT and coordinated by the Applied Superconductivity Laboratory (ASL) at SNU. Launched in 2022 with the vision of “One nation as one laboratory, one university,” PRISM is a five-year initiative with a total budget of 46.4 billion KRW, involving 27 industry, academic, and research institutions and more than 220 researchers. The group has systematically classified high-temperature superconducting magnets—applicable across a wide range of manufacturing industries—into four structural types and seven core technologies for the first time worldwide, and is developing key foundational technologies for large-scale production and premium-grade applications. In the joint research with the UKAEA, SNU led a response team composed of PRISM-affiliated companies Powernics Co., Ltd. (CEO: Kwang Hee Yoon) and Standard Magnet Co., Ltd. (CEO: Jae Min Kim). The team worked in close collaboration throughout the entire process of cable prototype design, fabrication, and evaluation, producing outstanding results. This achievement is also linked to the Ministry of Science and ICT’s “Deep Science Startup Activation Program” and is expected to lead to the creation of specialized domestic companies for fusion-dedicated HTS systems, centered on the response team. Furthermore, this collaboration is being carried out as part of the Seoul National University Energy Initiative (SNU-EI, Director: Professor Sung Jae Kim, Department of Electrical and Computer Engineering). In the context of fusion power—which is anticipated to play a crucial role in future electricity generation—the project is expected not only to advance HTS magnet technology but also to accelerate practical fusion commercialization. This will be achieved through partnerships with energy experts from the Production Division of SNU-EI, integrating core enabling technologies, reviewing technological limitations, and preparing for potential “unknown unknowns.” It also aims to establish a foundation for expanded cooperation and spinoff projects in the future. Building on the achievements of Phase 1, SNU and the UKAEA have signed a Phase 2 technology development agreement (total budget of £3.6 million, approx. 6.3 billion KRW, July 2025 – March 2027) to enhance the performance and extend the length of the developed HTS cable prototype. In this second phase, the collaboration aims to design HTS cables tens of meters in length that can be applied to the actual STEP fusion system, while also developing long-length manufacturing techniques and cryogenic performance evaluation systems in preparation for commercialization. In addition, the two institutions are expanding the scope of cooperation to include the design, fabrication, and evaluation of prototype TF (Toroidal Field) HTS magnets, a core component of the STEP fusion system. Through these efforts, the partnership is expected to deepen bilateral collaboration in compact fusion technology and contribute to advancing technical excellence. [Broadcast Coverage] SBS: “Unprecedented Figures”… Development of ‘World’s Best’ Superconducting Cable (https://news.sbs.co.kr/news/endPage.do?news_id=N1008236071&plink=ORI&cooper=NAVER) YTN: “Accelerating Fusion Commercialization”… Successful Development of High-Temperature Superconducting Cable (https://www.ytn.co.kr/_ln/0105_202508292038129467) The Korea Economic Daily TV: Korea Did It… Development of ‘World’s Best’ High-Temperature Superconducting Cable (https://www.wowtv.co.kr/NewsCenter/News/Read?articleId=A202508270708) Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56813 Translated by: Dohyung Kim, English Editor of the Department of Electrical and Computer Engineering, kimdohyung@snu.ac.kr...

[Authors] Professor Jaesang Lee, Postdoctoral Researcher. Donghyun Ko, and Undergraduate Chanyong Jeong, SNU ECE Quantitatively identified the percolation mechanism in organic devices by controlling charge flow via guest concentration. Expected to contribute to performance optimization of organic electronic devices such as OLEDs and solar cells. Published in Nano Letters, a top-tier international journal. Professor Jaesang Lee’s team (Dr. Donghyun Ko, postdoctoral researcher, Chanyong Jeong, undergraduate) quantitatively elucidated the percolative charge-transport mechanism occurring within the host–guest structure of organic semiconductor devices and proposed a new theoretical model to explain it. The study was published on June 26, 2025, in Nano Letters, a leading materials science journal issued by the American Chemical Society. (Paper title: “Percolative Charge Transport in Organic Semiconductor Devices with Host–Guest Layers”) In organic electronic devices such as organic light-emitting diodes (OLEDs) and organic photovoltaics (OPVs), the active layer is typically based on a host–guest molecular blend structure. It is known that the role of guest molecules is not limited to simple emitters or traps; they can also affect charge transport. The study focused in particular on the “percolation” phenomenon, in which, once the guest concentration exceeds a critical threshold, a network forms between guest molecules that allows current to flow. To this end, the team designed a special unipolar device structure (a hole-only device) that forces current to flow exclusively through the guest molecules, and experimentally measured charge-transport characteristics independently as the guest concentration varied. As a result, they defined the percolation critical concentration as the point at which charge transfer via direct guest–guest hopping accounts for roughly 1% or more of the total device current, and demonstrated that the device’s electrical response changes abruptly at this point. They also revealed that the deeper the trap depth of the guest molecules, the lower this percolation threshold becomes—because charges tend to reside on the guest rather than the host. Based on these characteristics, the team established a quantitative model that captures the factors governing charge transport and showed that it agrees with the experimental results. This study is among the first to quantitatively isolate and analyze the complex charge-transport pathways in multicomponent organic devices, providing concrete design criteria for optimizing efficiency by tuning the concentration and energy levels of guest molecules. In particular, by demonstrating the universality of the model at both room and low temperatures and across various host materials, the work highlights its potential as a design guideline for next-generation organic devices such as high-efficiency OLEDs and OPVs. The research was supported by Samsung Display, the Korea Institute for Advancement of Technology (KIAT), and the National Research Foundation of Korea (NRF). Image of driving voltage variation and percolation-current activation against guest content in host–guest devices Source:https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56652 Translated by: Dohyung Kim, English Editor of the Department of Electrical and Computer Engineering, kimdohyung@snu.ac.kr...

Professor Kyuseok Shim has been elected to the Board of Directors of ACM SIGKDD—an international academic society that holds the highest authority in the field of data mining—setting yet another milestone for the Korean academic community. ACM SIGKDD is the academic society most closely watched by data science and data mining researchers worldwide, and its Board of Directors is the core body that plays a central role in running the society. Through the 2025 ACM SIGKDD election, Professor Kyuseok Shim was chosen as one of the board officers—specifically as a Director—on the Executive Committee, which consists of a Chair, Secretary, Treasurer, and six Directors. This is the first time someone affiliated with a Korean institution has been elected, and it is regarded as further evidence of the international stature of Korea’s data science community. Professor Kyuseok Shim is a globally renowned scholar in databases and data mining and serves as Editor-in-Chief of the premier international journal, the VLDB Journal. Committed to expanding global research networks, he has secured the SIGKDD flagship conference (KDD 2026) for Jeju, where he will serve as General Chair, and successfully brought the ACM SIGMOD 2028 conference to Korea as well—both firsts for the country. This election not only signifies that Korea’s data science research capability has reached a world-class level, but also serves as an important affirmation of Professor Shim’s academic leadership and international credibility. Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56658 Translated by: Dohyung Kim, English Editor of the Department of Electrical and Computer Engineering, kimdohyung@snu.ac.kr...

From left: Professor Seung Hui Cui and Ph.D. candidate Jiyu Lee of SNU ECE. The research team of Jiyu Lee, Jonghun Yoon, and Jaekeun Lee from the Power Conversion Systems Laboratory (supervised by Professor Seung Hui Cui) received the Best Paper Award at the IEEE Power Electronics for Distributed Generation Systems 2025 (PEDG 2025), organized by the IEEE Power Electronics Society (PELS). The research team gave an oral presentation on the topic “Ultra-Fast Black Start Method for Grid-Forming Converters in Electronic Power Grid with Transformer Soft-Magnetization” during the special session titled “Grid-Forming Session.” This study was a collaborative effort with Professor Jaejeong Jeong’s lab at Kyungpook National University and Professor Heng Wu’s lab at Aalborg University in Denmark. It proposed a novel method to actively control transformer flux during Black Start using inverter resources after a blackout in large-scale power systems. This approach prevents inrush current and dramatically reduces the Black Start time from tens of seconds to the sub-millisecond range. At PEDG 2025, a total of 227 papers were presented; only 10 were shortlisted for the award, and just 3 were ultimately selected as Best Papers. Now in its 16th year, the IEEE PEDG—launched in 2010—has become a flagship international conference in power electronics for distributed generation. Each year, hundreds of researchers and industry experts attend to share the latest results and collaborate on renewable energy integration technologies and next-generation power conversion systems. Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56645 Translated by: Dohyung Kim, English Editor of the Department of Electrical and Computer Engineering, kimdohyung@snu.ac.kr...

Cover of the June 2025 Issue of Advanced Science The paper by Ph.D. candidate Junhyeong Park from the Advanced TFTs and Circuits for Smart Electronics Laboratory (ACELAB), led by Professor Sooyeon Lee, has been selected as the cover article for the June 2025 issue of Advanced Science. Advanced Science is one of the leading academic journals that covers groundbreaking research in cutting-edge science and technology, including materials science, electronic devices, nanotechnology, energy, and biomedical fields. It comprehensively introduces research achievements that contribute to the development of next-generation technologies. Details on the paper from Professor Sooyeon Lee’s research team are as follows: In the June 2025 issue, first authored by Junhyeong Park, the team implemented high-performance indium-gallium-zinc-oxide (IGZO) synaptic transistors and an array thereof for neuromorphic computing. By optimizing the floating-gate fabrication process, they lowered the transistors’ operating voltage and greatly extended synaptic-weight retention time. They also built a synapse array, confirming both large-area integrability and excellent device-to-device uniformity. Leveraging these array characteristics, they achieved high image-classification accuracy with a spiking neural network. Altogether, the study demonstrates that IGZO-based synaptic transistors can deliver high performance in large-scale neuromorphic systems. Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=56603 Translated by: Dohyung Kim, English Editor of the Department of Electrical and Computer Engineering, kimdohyung@snu.ac.kr...