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[ECE Department] Professor Woo Young Choi’s research team selected for the 2025 National R&D Top 100 Achievements

January 2, 2026l Hit 31

SNU ECE Professor Woo Young Choi’s research team named to the 2025 National R&D Top 100 Achievements

  • Reliability breakthrough via 3D NEM memory integration in CMOS interconnect layers
  • Proposition of next-generation ultra-low-power, high-reliability semiconductor device platform

▲ Professor Woo Young Choi’s research team, College of Engineering, Seoul National University

The College of Engineering at Seoul National University announced that the 3D-integrated CMOS–NEM memory technology developed by Professor Woo Young Choi’s research team in the Department of Electrical and Computer Engineering has been selected for the 2025 National Research and Development (R&D) Top 100 Achievements.

Prof. Choi’s team successfully addressed the long-standing reliability challenges that have hindered the practical adoption of NEM devices by introducing a novel approach that directly integrates nanoelectromechanical (NEM) memory devices three-dimensionally within CMOS interconnect layers previously used only passively, while preserving the intrinsic advantages of NEM technology, including ultra-low power consumption, zero leakage current, and abrupt switching behavior.

In particular, the core achievement selected for inclusion in the 2025 National R&D Excellent Achievements Top 100 is a NEM memory device featuring a Torsional-Via-Assisted (TVA) anchor structure that allows controlled torsional motion. This design effectively disperses mechanical stress concentration arising from repeated operation, experimentally demonstrating approximately a fivefold improvement in durability and stable operational characteristics compared to conventional structures. The technological significance of this work was formally recognized through its selection as the cover article of the December 2024 issue of IEEE Electron Device Letters, a leading international journal in the field. Notably, the proposed structure leverages vias already used in standard CMOS back-end interconnect processes, enabling a dramatic enhancement in reliability without additional area overhead or process cost. Furthermore, the team demonstrated the feasibility of implementing physically unclonable functions (PUFs) and associative memory using NEM memory devices, with these results published as cover articles in the July and September 2025 issues of Advanced Intelligent Systems, respectively.



▲ Electron microscope image of the via-anchor-based 3D CMOS–NEM memory structure and corresponding journal cover

2025 National R&D Top 100 Achievements Article Link: https://biz.chosun.com/science-chosun/science/2025/12/22/YTF3XQS275GMLPJOJXXX62WNEU/?utm_source=naver&utm_medium=original&utm_campaign=biz

 

Source: https://ece.snu.ac.kr/ece/news?md=v&bbsidx=57141

Translated by: Changhoon Kang, English Editor of the Department of Electrical and Computer Engineering, changhoon27@snu.ac.kr